The circuit shown here can be used as a logic | vedclass

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(B) The circuit consists of two $NPN$ transistors connected in parallel. The collectors are connected to $+V_{cc}$,and the emitters are connected toge

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$OR$

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(B) The circuit consists of two $NPN$ transistors connected in parallel. The collectors are connected to $+V_{cc}$,and the emitters are connected together to the output terminal,which is also grounded through a resistor.$1$. If both inputs $A$ and $B$ are at low voltage $(0)$,both transistors are in the cut-off state. The output is pulled to ground through the resistor,so $Out = 0$.$2$. If input $A$ is high $(1)$ and $B$ is low $(0)$,the top transistor conducts,and the output voltage becomes high $(1)$.$3$. If input $A$ is low $(0)$ and $B$ is high $(1)$,the bottom transistor conducts,and the output voltage becomes high $(1)$.$4$. If both inputs $A$ and $B$ are high $(1)$,both transistors conduct,and the output voltage becomes high $(1)$.The truth table is:$A=0, B=0 \implies Out=0$$A=1, B=0 \implies Out=1$$A=0, B=1 \implies Out=1$$A=1, B=1 \implies Out=1$This truth table corresponds to the $OR$ gate.

The circuit shown here can be used as a logic gate. The logic gate is

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